From b124548bcee1ab6d034d4499fe695073566ae37d Mon Sep 17 00:00:00 2001
From: dec05eba <dec05eba@protonmail.com>
Date: Wed, 2 Oct 2019 01:00:59 +0200
Subject: Add !=,<,<=,>,>=; both signed and not

---
 executor/x86_64/asm.c | 89 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)

(limited to 'executor/x86_64/asm.c')

diff --git a/executor/x86_64/asm.c b/executor/x86_64/asm.c
index f7bc19c..a400656 100644
--- a/executor/x86_64/asm.c
+++ b/executor/x86_64/asm.c
@@ -410,6 +410,14 @@ void asm_mov_rr(Asm *self, Reg64 dst, Reg64 src) {
     ins_end(self, "mov %s, %s", reg64_to_str(dst), reg64_to_str(src));
 }
 
+void asm_and_mr(Asm *self, AsmPtr *dst, Reg64 src) {
+    ins_start(self);
+    *self->code_it++ = rex_rm(dst, src);
+    *self->code_it++ = 0x21;
+    asm_rm(self, dst, src);
+    ins_end(self, "and %s, %s", asm_ptr_to_string(dst), reg64_to_str(src));
+}
+
 void asm_add_rr(Asm *self, Reg64 dst, Reg64 src) {
     ins_start(self);
     *self->code_it++ = rex_rr(dst, src);
@@ -515,6 +523,87 @@ void asm_sete_r(Asm *self, Reg64 dst) {
     ins_end(self, "sete %s", reg64_to_str(dst));
 }
 
+void asm_setne_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x95;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setne %s", reg64_to_str(dst));
+}
+
+void asm_setb_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x92;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setb %s", reg64_to_str(dst));
+}
+
+void asm_setbe_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x96;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setbe %s", reg64_to_str(dst));
+}
+
+void asm_seta_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x97;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "seta %s", reg64_to_str(dst));
+}
+
+void asm_setae_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x93;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setae %s", reg64_to_str(dst));
+}
+
+void asm_setl_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x9C;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setl %s", reg64_to_str(dst));
+}
+
+void asm_setle_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x9E;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setle %s", reg64_to_str(dst));
+}
+
+void asm_setg_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x9F;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setg %s", reg64_to_str(dst));
+}
+
+void asm_setge_r(Asm *self, Reg64 dst) {
+    assert(dst != RSP && dst != RBP && dst != RSI && dst != RDI);
+    ins_start(self);
+    *self->code_it++ = 0x0F;
+    *self->code_it++ = 0x9D;
+    asm_rr(self, dst, 0x0); /* the @src bits are not used */
+    ins_end(self, "setge %s", reg64_to_str(dst));
+}
+
 /*
     Note: This is sometimes called with @relative INT32_MAX-(2 or 6) (will print jz 0x7ffffff9), in which case it's most likely a dummy
     jump until the relative position is later changed with @asm_overwrite_jcc_rel32.
-- 
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