aboutsummaryrefslogtreecommitdiff
path: root/src/bytecode
diff options
context:
space:
mode:
authordec05eba <dec05eba@protonmail.com>2019-10-02 01:00:59 +0200
committerdec05eba <dec05eba@protonmail.com>2020-07-25 14:36:46 +0200
commitb124548bcee1ab6d034d4499fe695073566ae37d (patch)
treee4014070ac69a2b821e12cc9264ba54aaa8089f4 /src/bytecode
parent7eb8642c3ace697b03c4fc6edc90ea0ada715689 (diff)
Add !=,<,<=,>,>=; both signed and not
Diffstat (limited to 'src/bytecode')
-rw-r--r--src/bytecode/bytecode.c47
1 files changed, 46 insertions, 1 deletions
diff --git a/src/bytecode/bytecode.c b/src/bytecode/bytecode.c
index b947985..98698bc 100644
--- a/src/bytecode/bytecode.c
+++ b/src/bytecode/bytecode.c
@@ -522,7 +522,12 @@ static void add_instructions(BytecodeCompilerContext *self) {
}
case SSA_EQUALS: {
instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
- add_ins5(self, AMAL_OP_CMP, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "cmp r%d, r%d, r%d");
+ add_ins5(self, AMAL_OP_EQ, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "eq r%d, r%d, r%d");
+ break;
+ }
+ case SSA_NOT_EQUAL: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_NEQ, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "neq r%d, r%d, r%d");
break;
}
case SSA_AND: {
@@ -530,6 +535,46 @@ static void add_instructions(BytecodeCompilerContext *self) {
add_ins5(self, AMAL_OP_BIT_AND, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "and r%d, r%d, r%d");
break;
}
+ case SSA_ILT: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_ILT, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "ilt r%d, r%d, r%d");
+ break;
+ }
+ case SSA_ILE: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_ILE, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "ile r%d, r%d, r%d");
+ break;
+ }
+ case SSA_IGT: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_IGT, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "igt r%d, r%d, r%d");
+ break;
+ }
+ case SSA_IGE: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_IGE, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "ige r%d, r%d, r%d");
+ break;
+ }
+ case SSA_LT: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_LT, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "lt r%d, r%d, r%d");
+ break;
+ }
+ case SSA_LE: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_LE, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "le r%d, r%d, r%d");
+ break;
+ }
+ case SSA_GT: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_GT, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "gt r%d, r%d, r%d");
+ break;
+ }
+ case SSA_GE: {
+ instruction += ssa_extract_data(instruction, &ssa_ins_form2, sizeof(ssa_ins_form2));
+ add_ins5(self, AMAL_OP_GE, ssa_ins_form2.result, ssa_ins_form2.lhs, ssa_ins_form2.rhs, "ge r%d, r%d, r%d");
+ break;
+ }
case SSA_FUNC_START: {
instruction += ssa_extract_data(instruction, &ssa_ins_func_start, sizeof(ssa_ins_func_start));
add_ins6(self, AMAL_OP_FUNC_START, ssa_ins_func_start.flags, ssa_ins_func_start.num_local_vars_regs, "func_start 0x%02x, %u");